View EL5257IY-T7_1236549.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
EL5156, EL5157, EL5256, EL5257
Data Sheet June 15, 2006 FN7386.3
<1mV Voltage Offset, 600MHz Amplifiers
The EL5156, EL5157, EL5256, and EL5257 are 600MHz bandwidth -3dB voltage mode feedback amplifiers with DC accuracy of <0.01%, 1mV offsets and 40kV/V open loop gains. These amplifiers are ideally suited for applications ranging from precision measurement instrumentation to high speed video and monitor applications demanding the very highest linearity at very high frequency. Capable of operating with as little as 6.0mA of current from a single supply ranging from 5V to 12V and dual supplies ranging from 2.5V to 5.0V, these amplifiers are also well suited for handheld, portable and battery-powered equipment. With their capability to output as much as 140mA, any member of this family is comfortable with demanding load conditions. Single amplifiers are available in SOT-23 packages and duals in a 10 Ld MSOP package for applications where board space is critical. Additionally, singles and duals are available in the industry-standard 8 Ld SO package. All parts operate over the industrial temperature range of -40C to +85C.
Features
* 600MHz -3dB bandwidth, 240MHz 0.1dB bandwidth * 700V/s slew rate * <1mV input offset * Very high open loop gains 92dB * Low supply current = 6mA * 140mA output current * Single supplies from 5V to 12V * Dual supplies from 2.5V to 5V * Fast disable on the EL5156 and EL5256 * Low cost * Pb-free plus anneal available (RoHS compliant)
Applications
* Imaging * Instrumentation * Video * Communications devices
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2004, 2006. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL5156, EL5157, EL5256, EL5257 Ordering Information
PART NUMBER EL5156IS EL5156IS-T7 EL5156IS-T13 EL5156ISZ (Note) EL5156ISZ-T7 (Note) EL5156ISZ-T13 (Note) EL5157IW-T7 EL5157IW-T7A EL5157IWZ-T7 (Note) EL5157IWZ-T7A (Note) EL5256IY EL5256IY-T7 EL5256IY-T13 EL5257IS EL5257IS-T7 EL5257IS-T13 EL5257IY EL5257IY-T7 EL5257IY-T13 PART MARKING 5156IS 5156IS 5156IS 5156ISZ 5156ISZ 5156ISZ BHAA BHAA BAAM BAAM BAHAA BAHAA BAHAA 5257IS 5257IS 5257IS BAJAA BAJAA BAJAA TAPE & REEL 7" 13" 7" 13" 7" (3K pcs) 7" (250 pcs) 7" (3K pcs) 7" (250 pcs) 7" 13" 7" 13" 7" 13" PACKAGE 8 Ld SO 8 Ld SO 8 Ld SO 8 Ld SO (Pb-free) 8 Ld SO (Pb-free) 8 Ld SO (Pb-free) 5 Ld SOT-23 5 Ld SOT-23 5 Ld SOT-23 (Pb-free) 5 Ld SOT-23 (Pb-free) 10 Ld MSOP 10 Ld MSOP 10 Ld MSOP 8 Ld SO 8 Ld SO 8 Ld SO 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0038 MDP0038 MDP0038 MDP0038 MDP0043 MDP0043 MDP0043 MDP0027 MDP0027 MDP0027 MDP0043 MDP0043 MDP0043
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
EL5156 (8 LD SO) TOP VIEW
NC 1 IN- 2 IN+ 3 VS- 4 + 8 CE 7 VS+ 6 OUT 5 NC OUT 1 VS- 2 IN+ 3
EL5157 (5 LD SOT-23) TOP VIEW
5 VS+
+4 IN-
EL5256 (10 LD MSOP) TOP VIEW
INA+ 1 CEA 2 VS- 3 CEB 4 INB+ 5 + + 10 INA9 OUTA 8 VS+ 7 OUTB 6 INBOUTA 1 INA- 2 INA+ 3 VS- 4
EL5257 (8 LD SO) TOP VIEW
8 VS+ + + 7 OUTB 6 INB5 INB+
2
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257
Absolute Maximum Ratings (TA = 25C)
Supply Voltage between VS and VS- . . . . . . . . . . . . . . . . . . . . 13.2V Maximum Slewrate from VS+ and VS- . . . . . . . . . . . . . . . . . . . 1V/s Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.5V to VS +0.5V Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C Current into IN+, IN-, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER AC PERFORMANCE BW -3dB Bandwidth
VS+ = +5V, VS- = -5V, CE = +5V, RF = RG = 562, RL = 150, TA = 25C, unless otherwise specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
AV = +1, RL = 500, CL = 4.7pF AV = +2, RL = 150
600 180 210 70 500 640 700 15 0.005 0.04 12 5.5
MHz MHz MHz MHz V/s V/s ns % nV/Hz pA/Hz
GBWP BW1 SR
Gain Bandwidth Product 0.1dB Bandwidth Slew Rate
RL = 150 AV = +2 VO = -3.2V to +3.2V, AV = +2, RL = 150 VO = -3.2V to +3.2V, AV = +1, RL = 500
tS dG dP VN IN
0.1% Settling Time Differential Gain Error Differential Phase Error Input Referred Voltage Noise Input Referred Current Noise
AV = +1 AV = +2, RL = 150 AV = +2, RL = 150
DC PERFORMANCE VOS TCVOS AVOL Offset Voltage Input Offset Voltage Temperature Coefficient Open Loop Gain Measured from TMIN to TMAX VO is from -2.5V to 2.5V 10 -1 0.5 -3 40 1 mV V/C kV/V
INPUT CHARACTERISTICS CMIR CMRR IB Common Mode Input Range Common Mode Rejection Ratio Input Bias Current Guaranteed by CMRR test VCM = 2.5V to -2.5V EL5156 & EL5157 EL5256 & EL5257 IOS RIN CIN Input Offset Current Input Resistance Input Capacitance -2.5 80 -1 -600 -250 10 108 -0.4 -200 100 25 1 +1 +600 +250 +2.5 V dB A nA nA M pF
OUTPUT CHARACTERISTICS VOUT Output Voltage Swing RL = 150 to GND RL = 500 to GND IOUT Peak Output Current RL = 10 to GND 3.4 3.6 80 3.6 3.8 140 V V mA
ENABLE (EL5156 and EL5256 ONLY) tEN Enable Time 200 ns
3
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257
Electrical Specifications
PARAMETER tDIS IIHCE IILCE VIHCE VILCE SUPPLY ISON ISOFF PSRR Supply Current - Enabled (per amplifier) No load, VIN = 0V, CE = +5V 5.1 5 75 6.0 13 90 6.9 25 mA A dB Disable Time CE Pin Input High Current CE Pin Input Low Current CE Input High Voltage for Power-down CE Input Low Voltage for Power-up CE = VS+ CE = VS5 VS+ -1 VS+ -3 VS+ = +5V, VS- = -5V, CE = +5V, RF = RG = 562, RL = 150, TA = 25C, unless otherwise specified. CONDITIONS MIN TYP 300 0 13 -1 25 MAX UNIT ns A A V V
DESCRIPTION
Supply Current - Disabled (per amplifier) No load, VIN = 0V, CE = 5V Power Supply Rejection Ratio DC, VS = 3.0V to 6.0V
Typical Performance Curves
4 RL=150 CL=4.7pF NORMALIZED GAIN (dB) 2 AV=+2 0 AV=+1 45 135 RL=150 CL=4.7pF AV=+5 AV=+2 PHASE () -45 AV=+10 -135
-2
AV=+10 AV=+5
-4
-225
-6 100K
1M
10M FREQUENCY (Hz)
100M
1G
-315 100K
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 1. SMALL SIGNAL FREQUENCY RESPONSE - GAIN
FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE PHASE FOR VARIOUS GAINS
5 AV=+1 RL=500 3 CL=27pF CL=10pF CL=4.7pF
4 VS=5V AV=+2 2 RF=RG=562 RL=500 RL=150 -2 RL=750 RL=50
NORMALIZED GAIN (dB)
0
GAIN (dB)
1
-1
CL=1pF
-4
-3
-6 100K
1M
10M FREQUENCY (Hz)
100M
1G
-5 100K
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS RL
FIGURE 4. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS CL
4
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 Typical Performance Curves (Continued)
5 AV=+2 RL=500 3 RF=RG=500 CL=10pF 1 CL=8.2pF CL=4.7pF -3 CL=0pF 0 CL=22pF GAIN (dB) 8 16 AV=+2 RL=150 12 RF=RG=562 CL=100pF CL=33pF CL=10pF CL=180pF
NORMALIZED GAIN (dB)
-1
4
CL=0pF
-5 100K
1M
10M FREQUENCY (Hz)
100M
1G
-4 100K
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 5. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS CL
5 AV=+5 RL=500 NORMALIZED GAIN (dB) CL=82pF 1 CL=68pF CL=22pF -3
FIGURE 6. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS CL
5 AV=+1 RL=500 3 CL=4.7pF 3.0V 2.0V -1 4.0V 5.0V -3
CL=100pF
NORMALIZED GAIN (dB) 1G
3
1
-1
-5 100K
1M
10M FREQUENCY (Hz)
100M
-5 100K
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 7. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS CL
5 AV=+1 RL=500 3 CL=4.7pF AV=+1
FIGURE 8. FREQUENCY RESPONSE vs POWER SUPPLY
4 VS=5V RF=620 2 RL=150 AV=-1 0 AV=-2
NORMALIZED GAIN (dB)
1
-1 AV=+2 -3 AV=+5
NORMALIZED GAIN (dB) 100M 1G
-2
-4
-5 100K
1M
10M FREQUENCY (Hz)
-6 100K
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 9. EL5256 SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS GAINS
FIGURE 10. SMALL SIGNAL INVERTING FREQUENCY RESPONSE FOR VARIOUS GAINS
5
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 Typical Performance Curves (Continued)
4 AV=+1 CL=0.2pF NORMALIZED GAIN (dB) 2 RL=500 RL=300 NORMALIZED GAIN (dB) 3 RL=500 1 RL=200 5 AV=+1 CL=4.7pF
0 RL=150 -2
-1 RL=50 -3 RL=100
-4
-6 100K
1M
10M FREQUENCY (Hz)
100M
1G
-5 100K
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 11. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS RL
5 AV=+2 RL=500 3 CL=4.7pF RF=500 1 CIN=0.2pF CIN=0pF -3 CIN=12pF CIN=8.2pF CIN=4.7pF
FIGURE 12. EL5256 SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS RL
4 AV=+5 CL=4.7pF 2 RL=500 RF=102 0 CIN=68pF CIN=47pF CIN=22pF
NORMALIZED GAIN (dB)
-1
NORMALIZED GAIN (dB)
-2
CIN=0pF CIN=4.7pF
-4
-5 100K
1M
10M
100M
-6 100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 13. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS CIN
4 VS=5V AV=+2 2 RL=150 CL=4.7pF 0 RF=RG=562 -2 RF=RG=500 RF=RG=250 -4
FIGURE 14. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS CIN
6 AV=+2 CL=4.7pF 4 RL=500 RF=RG=3k RF=RG=2k RF=RG=1k
NORMALIZED GAIN (dB)
RF=RG=350
RF=RG=1k
NORMALIZED GAIN (dB)
2
0 RF=RG=500 -2 RF=RG=200
-6 100K
1M
10M FREQUENCY (Hz)
100M
1G
-4 100K
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 15. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS RF AND RG
FIGURE 16. EL5256 SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS RF AND RG
6
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 Typical Performance Curves (Continued)
5 AV=+2 RL=200 CL=4.7pF +15dBm -20dBm +10dBm +17dBm +20dBm 5 AV=+1 RL=500 3 CL=4.7pF CH1
NORMALIZED GAIN (dB)
1
NORMALIZED GAIN (dB)
3
1 CH2
-1
-1
-3
-3
-5 100K
1M
10M FREQUENCY (Hz)
100M
1G
-5 100K
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 17. LARGE SIGNAL FREQUENCY RESPONSE FOR VARIOUS INPUT AMPLITUDES
0 AV=+5 RL=500 -20 CL=4.7pF CROSS TALK (10dB)
FIGURE 18. CHANNEL TO CHANNEL FREQUENCY RESPONSE
700 AV=+1, RL=500, CL=5pF 600 500
-40
BW (MHz)
AV=+1, RL=150 400 300 200 AV=+2, RL=150
-60
-80 100 -100 100K 0 4.5
1M
10M FREQUENCY (Hz)
100M
1G
5.5
6.5
7.5
8.5 VS (V)
9.5
10.5 11.5 12.5
FIGURE 19. EL5256 CROSS TALK vs FREQUENCY CHANNEL A TO B & B TO A
4
FIGURE 20. BANDWIDTH vs SUPPLY VOLTAGE
1K VOLTAGE NOISE (nV/Hz), CURRENT NOISE (pA/Hz) AV=+5 CL=4.7pF
NORMALIZED GAIN (dB)
2 RL=1k 0 RL=500 -2 RL=100 RL=50
100
VN 10 IN 1 100K
-4
-6 100K
1M
10M FREQUENCY (Hz)
100M
1G
1M
10M
10M
100M
100M
1G
FREQUENCY (Hz)
FIGURE 21. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS RL
FIGURE 22. VOLTAGE AND CURRENT NOISE vs FREQUENCY
7
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 Typical Performance Curves (Continued)
-20 1K AV=+2 RL=0 RG=RF=400 100 IMPEDANCE ()
-40 CMRR (dB)
-60
10
-80
1 -100
-120 100
1K
10K
100K
1M
10M
100M
0.01 1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 23. CMRR
-10 DISABLED ISOLATION (dB) VS=5V AV=+2 -30 RL=150 6.1 6 5.9 5.8 IS (mA) 5.7
FIGURE 24. OUTPUT IMPEDANCE
-50
ISIS+
-70
5.6 5.5 5.4
-90
-110 100K
1M
10M FREQUENCY (Hz)
100M
1G
5.3 4.5
5.5
6.5
7.5
8.5 VS (V)
9.5
10.5
11.5
FIGURE 25. INPUT TO OUTPUT ISOLATION vs FREQUENCY DISABLE
FIGURE 26. SUPPLY CURRENT vs SUPPLY VOLTAGE
0.8 AV=+2 RL=500 SUPPLY=5V 12.3mA PEAKING (dB) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 4.5 5.5 6.5 7.5 8.5 VS (V) 9.5 10.5 11.5 12.5 AV=+1 CL=5pF RL=500
ENABLE 192ns
DISABLE 322ns
TIME (400ns/DIV)
FIGURE 27. ENABLE/DISABLE RESPONSE
FIGURE 28. PEAKING vs SUPPLY VOLTAGE
8
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 Typical Performance Curves (Continued)
AV=+2 RL=500 SUPPLY=5V 12.3mA OUTPUT=200mVP-P AV=+2 RL=500 SUPPLY=5V 12.3mA OUTPUT=200mVP-P
VOUT (40mV/DIV)
VOUT (40mV/DIV)
0 RISE 20%-80% T=2.025ns
0 FALL 80%-20% T=1.7ns
TIME (4ns/DIV)
TIME (4ns/DIV)
FIGURE 29. SMALL SIGNAL RISE TIME
FIGURE 30. SMALL SIGNAL FALL TIME
VOUT (400mV/DIV)
0 RISE 20%-80% T=1.657ns
VOUT (400mV/DIV)
AV=+2 RL=500 SUPPLY=5V 12.3mA OUTPUT=2.0VP-P
AV=+2 RL=500 SUPPLY=5V 12.3mA OUTPUT=2.0VP-P
0 FALL 80%-20% T=1.7ns
TIME (2ns/DIV)
TIME (2ns/DIV)
FIGURE 31. LARGE SIGNAL RISE TIME
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
FIGURE 32. LARGE SIGNAL FALL TIME
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.8 1.6 POWER DISSIPATION (W) 1.4
1.2 POWER DISSIPATION (W) 1 0.8 0.6
1.2 1.136W 1 870mW 0.8 0.6 543mW 0.4 0.2 0 0 25
781mW SO8 JA=160C/W 488mW SOT23-5 JA=256C/W
SO8 JA=110C/W MSOP10 JA=115C/W
0.4 486mW 0.2 0 MSOP10 JA=115C/W 0 25 50 75 85
SOT23-5 JA=230C/W 50 75 85 100 125 150
100
125
150
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
FIGURE 33. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 34. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
9
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 EL5156 Product Description
The EL5156, EL5157, EL5256, and EL5257 are wide bandwidth, single or dual supply, low power and low offset voltage feedback operational amplifiers. Both amplifiers are internally compensated for closed loop gain of +1 or greater. Connected in voltage follower mode and driving a 500 load, the -3dB bandwidth is about 610MHz. Driving a 150 load and a gain of 2, the bandwidth is about 180MHz while maintaining a 600V/s slew rate. The EL5156 and EL5256 are available with a power-down pin to reduce power to 17A typically while the amplifier is disabled. This is especially difficult when driving a standard video load of 150, because of the change in output current with DC level. The dG and dP for these families are about 0.006% and 0.04%, while driving 150 at a gain of 2. Driving high impedance loads would give a similar or better dG and dP performance.
Driving Capacitive Loads and Cables
The EL5156 and EL5157 families can drive 27pF loads in parallel with 500 with less than 5dB of peaking at gain of +1. If less peaking is desired in applications, a small series resistor (usually between 5 to 50) can be placed in series with the output to eliminate most peaking. However, this will reduce the gain slightly. If the gain setting is greater than 1, the gain resistor RG can then be chosen to make up for any gain loss which may be created by the additional series resistor at the output. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can help to reduce peaking.
Input, Output and Supply Voltage Range
The EL5156 and EL5157 families have been designed to operate with supply voltage from 5V to 12V. That means for single supply application, the supply voltage is from 5V to 12V. For split supplies application, the supply voltage is from 2.5V to 5V. The amplifiers have an input common mode voltage range from 1.5V above the negative supply (VS- pin) to 1.5V below the positive supply (VS+ pin). If the input signal is outside the above specified range, it will cause the output signal to be distorted. The outputs of the EL5156 and EL5157 families can swing from -4V to 4V for VS = 5V. As the load resistance becomes lower, the output swing is lower. If the load resistor is 500, the output swing is about -4V at a 4V supply. If the load resistor is 150, the output swing is from -3.5V to 3.5V.
Disable/Power-Down
The EL5156 and EL5256 can be disabled and their output placed in a high impedance state. The turn-off time is about 330ns and the turn-on time is about 130ns. When disabled, the amplifier's supply current is reduced to 17A typically, thereby effectively eliminating the power consumption. The amplifier's power-down can be controlled by standard TTL or CMOS signal levels at the ENABLE pin. The applied logic signal is relative to VS- pin. Letting the ENABLE pin float or applying a signal that is less than 0.8V above VS- will enable the amplifier. The amplifier will be disabled when the signal at ENABLE pin is above VS+ -1.5V.
Choice of Feedback Resistor and Gain Bandwidth Product
For applications that require a gain of +1, no feedback resistor is required. Just short the output pin to the inverting input pin. For gains greater than +1, the feedback resistor forms a pole with the parasitic capacitance at the inverting input. As this pole becomes smaller, the amplifier's phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, RF can't be very big for optimum performance. If a large value of RF must be used, a small capacitor in the few Pico farad range in parallel with RF can help to reduce the ringing and peaking at the expense of reducing the bandwidth. For gain of +1, RF = 0 is optimum. For the gains other than +1, optimum response is obtained with RF between 500 to 750. The EL5156 and EL5157 families have a gain bandwidth product of 210MHz. For gains 5, its bandwidth can be predicted by the following equation:
Gain x BW = 210MHz
Output Drive Capability
The EL5156 and EL5157 families do not have internal short circuit protection circuitry. They have a typical short circuit current of 95mA and 70mA. If the output is shorted indefinitely, the power dissipation could easily overheat the die or the current could eventually compromise metal integrity. Maximum reliability is maintained if the output current never exceeds 40mA. This limit is set by the design of the internal metal interconnect. Note that in transient applications, the part is robust.
Power Dissipation
With the high output drive capability of the EL5152 and EL5153 families, it is possible to exceed the 125C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for an application to
Video Performance
For good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as DC levels are changed at the output.
10
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257
determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. The maximum power dissipation allowed in a package is determined according to:
T JMAX - T AMAX PD MAX = ------------------------------------------- JA
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces.
Where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: For sourcing:
n
PD MAX = V S x I SMAX +
i=1
( VS - VOUTi ) x ----------------R Li
n
V OUTi
For sinking:
PD MAX = V S x I SMAX +
( VOUTi - VS ) x ILOADi
i=1
Where: VS = Supply voltage ISMAX = Maximum quiescent supply current VOUT = Maximum output voltage of the application RLOAD = Load resistance tied to ground ILOAD = Load current N = number of amplifiers (max = 2) By setting the two PDMAX equations equal to each other, we can solve the output current and RLOAD to avoid the device overheat.
Power Supply Bypassing Printed Circuit Board Layout
As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7F tantalum capacitor in parallel with a 0.1F ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail. See Figure 37 for a complete tuned power supply bypass methodology.
11
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 Application Circuits
Sullen Key Low Pass Filter
A common and easy to implement filter taking advantage of the wide bandwidth, low offset and low power demands of the EL5152. A derivation of the transfer function is provided for convenience (See Figure 35).
Sullen Key High Pass Filter
Again this useful filter benefits from the characteristics of the EL5152. The transfer function is very similar to the low pass so only the results are presented (See Figure 36).
V2 5V L1 10H TUNED POWER BYPASS NETWORK R5 1k C5 1nF C1 1nF R1 V1 1k R2 + 1k C2 1nF RB 1k RA 1k C5 1nF R6 1k L1 10H V3 5V V+ VVOUT R7 1k C3 1nF
K = 1+ Vo = K
RB RA
1 V1 R2C2s + 1 Vo V1 - Vi K - V1 + Vo - Vi = 0 1+ 1 R1 R2 C1s K H(s) = R1C1R2C2s 2 + ((1 - K )R1C1 + R1C2 + R21C2)s + 1 1 H( jw ) = 2 1 - w R1C1R2C2 + jw ((1 - K )R1C1 + R1C2 + R2C2) Holp = K wo = Q= 1 R1C1R2C2 1 R1C1 R1C2 R2C2 (1 - K ) + + R2C2 R2C1 R1C1
TUNED POWER BYPASS NETWORK
C4 1nF
Holp = K 1 wo = RC 1 Q= 3 -K
Equations simplify if we let all components be equal R=C
FIGURE 35. SULLEN KEY LOW PASS FILTER
12
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257
V2 5V L1 10H TUNED POWER BYPASS NETWORK R5 1k C5 1nF C1 1nF R1 V1 1k R2 + 1k C2 1nF RB 1k RA 1k C5 1nF R6 1k L1 10H V3 5V V+ VVOUT R7 1k C3 1nF
Holp = K wo = Q= 1 R1C1R2C2 1 R1C1 R1C2 R2C2 (1 - K ) + + R2C2 R2C1 R1C1
TUNED POWER BYPASS NETWORK
C4 1nF
Holp =
K 4 -K
Equations simplify if we let all components be equal R=C
2 wo = RC Q= 2 4 -K
FIGURE 36. SULLEN KEY HIGH PASS FILTER
Differential Output Instrumentation Amplifier
The addition of a third amplifier to the conventional three amplifier instrumentation amplifier introduces the benefits of differential signal realization, specifically the advantage of using common mode rejection to remove coupled noise and ground potential errors inherent in remote transmission. This configuration also provides enhanced bandwidth, wider output swing and faster slew rate than conventional three amplifier solutions with only the cost of an additional amplifier and few resistors.
e1
A1 + R2
R3
R3
A3 + R3 R3 +
eo3
RG
R3
R3
REF eo
R2
A4 + R3 R3
eo4
A2 e2 +
e o3 = - ( 1 + 2R 2 R G ) ( e 1 - e 2 ) e o = - 2 ( 1 + 2R 2 R G ) ( e 1 - e 2 ) 2f C1, 2 BW = ----------------A Di
e o4 = ( 1 + 2R 2 R G ) ( e 1 - e 2 )
A Di = - 2 ( 1 + 2R 2 R G )
13
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257
Strain Gauge
The strain gauge is an ideal application to take advantage of the moderate bandwidth and high accuracy of the EL5152. The operation of the circuit is very straightforward. As the strain variable component resistor in the balanced bridge is subjected to increasing strain, its resistance changes, resulting in an imbalance in the bridge. A voltage variation from the referenced high accuracy source is generated and translated to the difference amplifier through the buffer stage. This voltage difference as a function of the strain is converted into an output voltage.
14
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. L 2/01
15
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 SOT-23 Package Family
e1 A N 6 4
MDP0038
D
SOT-23 PACKAGE FAMILY SYMBOL A A1 A2 SOT23-5 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 5 SOT23-6 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 6 TOLERANCE MAX 0.05 0.15 0.05 0.06 Basic Basic Basic Basic Basic 0.10 Reference Reference Rev. E 3/00 NOTES: 1. Plastic or metal protrusions of 0.25mm maximum per side are not included.
E1 2 3
E
b c D
0.20 C
0.15 C D 2X 5 e B b NX 1 2 3 2X 0.20 M C A-B D
E E1 e e1 L L1 N
0.15 C A-B 2X C D
1
3
A2 SEATING PLANE 0.10 C NX A1
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. This dimension is measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only). 6. SOT23-5 version has no center lead (shown as a dashed line).
(L1)
H
A
GAUGE PLANE c L 0 +3 -0
0.25
16
FN7386.3 June 15, 2006
EL5156, EL5157, EL5256, EL5257 Mini SO Package Family (MSOP)
0.25 M C A B D N A (N/2)+1
MDP0043
MINI SO PACKAGE FAMILY SYMBOL A A1 A2 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. C 6/99
E
E1
PIN #1 I.D.
b c D
B
1 (N/2)
E E1 e
e C SEATING PLANE 0.10 C N LEADS b
H
L L1 N
0.08 M C A B
NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H".
L1 A c SEE DETAIL "X"
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
0.25
A1
3 3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 17
FN7386.3 June 15, 2006

▲Up To Search▲

Price & Availability of EL5257IY-T7

	To Download EL5257IY-T7 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .